Case Studies
RISC-V
A Comparison on Different AMBA 5 CHI Verification IPs
In today’s semiconductor world, system-on-chip (SoC) designs face a very specific challenge
Comprehensive Verification of the RISC-V Memory Management Unit: Challenges and Solutions
The Memory Management Unit plays such an integral part in designing modern
Impact of the Code Size Reduction Extension (Zce) on RISC-V Cores
The RISC-V instruction set architecture, known for its flexibility and efficiency, is
Making ARA Vector Processor RISC-V Vector Extension (RVV) 1.0 Compatible
The RISC-V Vector Extension (RVV) has undergone significant revisions since its initial
Integrating Virtual Memory in ARA a RISC-V Vector Coprocessor: A Milestone for Linux Compatibility and High-Performance Computing
Virtual memory is essential for modern processor design, providing benefits like memory
ISP
Enhancing Image Quality of Optim Endoscope with 10xEngineers’ Soft-ISP
The client provided us with images from their current endoscope and images
Compilers
LLM Inference with Codebook-based Q4X Quantization using the Llama.cpp Framework on RISC-V Vector CPUs
We utilize QuantX [MN25], our in-house hardware-aware quantization platform, to generate a